7492
4-bit asynchronous divide-by-twelve counter with /2 and /6 sections and reset.

      +----------+
/CLK1 |1  +--+ 14| /CLK0
      |2       13|
      |3       12| Q0
      |4  7492 11| Q3
  VCC |5       10| GND
 RST1 |6        9| Q1
 RST2 |7        8| Q2
      +----------+

[This information is part of the GIICM]