*8259(A) *Programmable Interrupt Controller (PIC) *8259 from INTEL databook *8259A from NEC databook *19891203/wjvg icw = initialization command word ocw = operation command word initialization command word 1 (icw1) 0 w aaa1.... a7..a5 of lower routine address (8085 mode only) w ...11... 8259a: level interrupt/edge detect mode w ...1.1.. call address interval is 4/8 w ...1..1. single/multiple 8259's in system, (single: icw3 not needed) w ...1...1 8259a: icw4 following after this command 2/3 bytes must be put in location 1 operation command word 2 (ocw2) 0 w ...00nnn level to be reset or put into lowest priority w 00000... no action w .0100... reset the highest priority bit of the in-service register w .1000... don't reset any interrupt w .1100nnn reset bit #nnn of the in-service register w 1..00... rotate priority operation command word 3 (ocw3) 0 w ...01.0x no action w ...01.10 on next read: read 0=interrupt request register w ...01.11 on next read: read 0=in-service register w ...011.. on next read: read 0=nr of highest level requesting interrupt w .0x01... no action w .1001... reset special mask w .1101... set special mask w x..01... don't care rest of the operation command words: 1 w nnnnnnnn ocw1: set interrupt mask per interrupt, 1 = disable int rest of the initializtion command words: 1 w AAAAAAAA icw2: 8085 mode: routine address a15..a8 w aaaaaAAA 8086 mode: vektor address a7..a3, a10..a8 if !(icw1&2) 1 w nnnnnnnn icw3: if master: interrupt input #n has a slave 8259 w xxxxx... if slave: don't care w .....nnn slave identification # if icw1&1 (8259a only) 1 w 000..... icw4: allways w ...1.... special fully nested mode w ....11.. buffered mode, master w ....10.. buffered mode, slave w ......1. automatic end of interrupt mode w .......1 8086/8085 mode *end